
serial-ops:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400578 <_init>:
  400578:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  40057c:	910003fd 	mov	x29, sp
  400580:	9400003e 	bl	400678 <call_weak_fn>
  400584:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400588:	d65f03c0 	ret

Disassembly of section .plt:

0000000000400590 <.plt>:
  400590:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  400594:	b0000090 	adrp	x16, 411000 <__FRAME_END__+0xfae8>
  400598:	f947fe11 	ldr	x17, [x16, #4088]
  40059c:	913fe210 	add	x16, x16, #0xff8
  4005a0:	d61f0220 	br	x17
  4005a4:	d503201f 	nop
  4005a8:	d503201f 	nop
  4005ac:	d503201f 	nop

00000000004005b0 <strlen@plt>:
  4005b0:	d0000090 	adrp	x16, 412000 <strlen@GLIBC_2.17>
  4005b4:	f9400211 	ldr	x17, [x16]
  4005b8:	91000210 	add	x16, x16, #0x0
  4005bc:	d61f0220 	br	x17

00000000004005c0 <strncmp@plt>:
  4005c0:	d0000090 	adrp	x16, 412000 <strlen@GLIBC_2.17>
  4005c4:	f9400611 	ldr	x17, [x16, #8]
  4005c8:	91002210 	add	x16, x16, #0x8
  4005cc:	d61f0220 	br	x17

00000000004005d0 <__libc_start_main@plt>:
  4005d0:	d0000090 	adrp	x16, 412000 <strlen@GLIBC_2.17>
  4005d4:	f9400a11 	ldr	x17, [x16, #16]
  4005d8:	91004210 	add	x16, x16, #0x10
  4005dc:	d61f0220 	br	x17

00000000004005e0 <__gmon_start__@plt>:
  4005e0:	d0000090 	adrp	x16, 412000 <strlen@GLIBC_2.17>
  4005e4:	f9400e11 	ldr	x17, [x16, #24]
  4005e8:	91006210 	add	x16, x16, #0x18
  4005ec:	d61f0220 	br	x17

00000000004005f0 <abort@plt>:
  4005f0:	d0000090 	adrp	x16, 412000 <strlen@GLIBC_2.17>
  4005f4:	f9401211 	ldr	x17, [x16, #32]
  4005f8:	91008210 	add	x16, x16, #0x20
  4005fc:	d61f0220 	br	x17

0000000000400600 <puts@plt>:
  400600:	d0000090 	adrp	x16, 412000 <strlen@GLIBC_2.17>
  400604:	f9401611 	ldr	x17, [x16, #40]
  400608:	9100a210 	add	x16, x16, #0x28
  40060c:	d61f0220 	br	x17

0000000000400610 <printf@plt>:
  400610:	d0000090 	adrp	x16, 412000 <strlen@GLIBC_2.17>
  400614:	f9401a11 	ldr	x17, [x16, #48]
  400618:	9100c210 	add	x16, x16, #0x30
  40061c:	d61f0220 	br	x17

0000000000400620 <putchar@plt>:
  400620:	d0000090 	adrp	x16, 412000 <strlen@GLIBC_2.17>
  400624:	f9401e11 	ldr	x17, [x16, #56]
  400628:	9100e210 	add	x16, x16, #0x38
  40062c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400630 <_start>:
  400630:	d280001d 	mov	x29, #0x0                   	// #0
  400634:	d280001e 	mov	x30, #0x0                   	// #0
  400638:	aa0003e5 	mov	x5, x0
  40063c:	f94003e1 	ldr	x1, [sp]
  400640:	910023e2 	add	x2, sp, #0x8
  400644:	910003e6 	mov	x6, sp
  400648:	580000c0 	ldr	x0, 400660 <_start+0x30>
  40064c:	580000e3 	ldr	x3, 400668 <_start+0x38>
  400650:	58000104 	ldr	x4, 400670 <_start+0x40>
  400654:	97ffffdf 	bl	4005d0 <__libc_start_main@plt>
  400658:	97ffffe6 	bl	4005f0 <abort@plt>
  40065c:	00000000 	.inst	0x00000000 ; undefined
  400660:	0040132c 	.word	0x0040132c
  400664:	00000000 	.word	0x00000000
  400668:	00401378 	.word	0x00401378
  40066c:	00000000 	.word	0x00000000
  400670:	004013f8 	.word	0x004013f8
  400674:	00000000 	.word	0x00000000

0000000000400678 <call_weak_fn>:
  400678:	b0000080 	adrp	x0, 411000 <__FRAME_END__+0xfae8>
  40067c:	f947f000 	ldr	x0, [x0, #4064]
  400680:	b4000040 	cbz	x0, 400688 <call_weak_fn+0x10>
  400684:	17ffffd7 	b	4005e0 <__gmon_start__@plt>
  400688:	d65f03c0 	ret
  40068c:	00000000 	.inst	0x00000000 ; undefined

0000000000400690 <deregister_tm_clones>:
  400690:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400694:	91114000 	add	x0, x0, #0x450
  400698:	d0000081 	adrp	x1, 412000 <strlen@GLIBC_2.17>
  40069c:	91114021 	add	x1, x1, #0x450
  4006a0:	eb00003f 	cmp	x1, x0
  4006a4:	540000a0 	b.eq	4006b8 <deregister_tm_clones+0x28>  // b.none
  4006a8:	b0000001 	adrp	x1, 401000 <startwith_gga_head+0x30>
  4006ac:	f9420c21 	ldr	x1, [x1, #1048]
  4006b0:	b4000041 	cbz	x1, 4006b8 <deregister_tm_clones+0x28>
  4006b4:	d61f0020 	br	x1
  4006b8:	d65f03c0 	ret
  4006bc:	d503201f 	nop

00000000004006c0 <register_tm_clones>:
  4006c0:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  4006c4:	91114000 	add	x0, x0, #0x450
  4006c8:	d0000081 	adrp	x1, 412000 <strlen@GLIBC_2.17>
  4006cc:	91114021 	add	x1, x1, #0x450
  4006d0:	cb000021 	sub	x1, x1, x0
  4006d4:	9343fc21 	asr	x1, x1, #3
  4006d8:	8b41fc21 	add	x1, x1, x1, lsr #63
  4006dc:	9341fc21 	asr	x1, x1, #1
  4006e0:	b40000a1 	cbz	x1, 4006f4 <register_tm_clones+0x34>
  4006e4:	b0000002 	adrp	x2, 401000 <startwith_gga_head+0x30>
  4006e8:	f9421042 	ldr	x2, [x2, #1056]
  4006ec:	b4000042 	cbz	x2, 4006f4 <register_tm_clones+0x34>
  4006f0:	d61f0040 	br	x2
  4006f4:	d65f03c0 	ret

00000000004006f8 <__do_global_dtors_aux>:
  4006f8:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4006fc:	910003fd 	mov	x29, sp
  400700:	f9000bf3 	str	x19, [sp, #16]
  400704:	d0000093 	adrp	x19, 412000 <strlen@GLIBC_2.17>
  400708:	39514260 	ldrb	w0, [x19, #1104]
  40070c:	35000080 	cbnz	w0, 40071c <__do_global_dtors_aux+0x24>
  400710:	97ffffe0 	bl	400690 <deregister_tm_clones>
  400714:	52800020 	mov	w0, #0x1                   	// #1
  400718:	39114260 	strb	w0, [x19, #1104]
  40071c:	f9400bf3 	ldr	x19, [sp, #16]
  400720:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400724:	d65f03c0 	ret

0000000000400728 <frame_dummy>:
  400728:	17ffffe6 	b	4006c0 <register_tm_clones>

000000000040072c <extract_data>:
  40072c:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400730:	910003fd 	mov	x29, sp
  400734:	f9000fa0 	str	x0, [x29, #24]
  400738:	b90017a1 	str	w1, [x29, #20]
  40073c:	b94017a1 	ldr	w1, [x29, #20]
  400740:	f9400fa0 	ldr	x0, [x29, #24]
  400744:	94000005 	bl	400758 <append_to_buffer>
  400748:	9400002e 	bl	400800 <try_extract_data>
  40074c:	d503201f 	nop
  400750:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400754:	d65f03c0 	ret

0000000000400758 <append_to_buffer>:
  400758:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  40075c:	910003fd 	mov	x29, sp
  400760:	f9000fa0 	str	x0, [x29, #24]
  400764:	b90017a1 	str	w1, [x29, #20]
  400768:	b9002fbf 	str	wzr, [x29, #44]
  40076c:	14000018 	b	4007cc <append_to_buffer+0x74>
  400770:	b9802fa0 	ldrsw	x0, [x29, #44]
  400774:	f9400fa1 	ldr	x1, [x29, #24]
  400778:	8b000021 	add	x1, x1, x0
  40077c:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400780:	91116000 	add	x0, x0, #0x458
  400784:	b9400000 	ldr	w0, [x0]
  400788:	11000403 	add	w3, w0, #0x1
  40078c:	d0000082 	adrp	x2, 412000 <strlen@GLIBC_2.17>
  400790:	91116042 	add	x2, x2, #0x458
  400794:	b9000043 	str	w3, [x2]
  400798:	39400022 	ldrb	w2, [x1]
  40079c:	d0000181 	adrp	x1, 432000 <rtcm_datas+0x1fa98>
  4007a0:	9115a021 	add	x1, x1, #0x568
  4007a4:	93407c00 	sxtw	x0, w0
  4007a8:	38206822 	strb	w2, [x1, x0]
  4007ac:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  4007b0:	91116000 	add	x0, x0, #0x458
  4007b4:	b9400000 	ldr	w0, [x0]
  4007b8:	7120001f 	cmp	w0, #0x800
  4007bc:	540001c0 	b.eq	4007f4 <append_to_buffer+0x9c>  // b.none
  4007c0:	b9402fa0 	ldr	w0, [x29, #44]
  4007c4:	11000400 	add	w0, w0, #0x1
  4007c8:	b9002fa0 	str	w0, [x29, #44]
  4007cc:	b9402fa1 	ldr	w1, [x29, #44]
  4007d0:	b94017a0 	ldr	w0, [x29, #20]
  4007d4:	6b00003f 	cmp	w1, w0
  4007d8:	54fffccb 	b.lt	400770 <append_to_buffer+0x18>  // b.tstop
  4007dc:	d0000180 	adrp	x0, 432000 <rtcm_datas+0x1fa98>
  4007e0:	9115a001 	add	x1, x0, #0x568
  4007e4:	b0000000 	adrp	x0, 401000 <startwith_gga_head+0x30>
  4007e8:	91110000 	add	x0, x0, #0x440
  4007ec:	97ffff89 	bl	400610 <printf@plt>
  4007f0:	14000002 	b	4007f8 <append_to_buffer+0xa0>
  4007f4:	d503201f 	nop
  4007f8:	a8c37bfd 	ldp	x29, x30, [sp], #48
  4007fc:	d65f03c0 	ret

0000000000400800 <try_extract_data>:
  400800:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400804:	910003fd 	mov	x29, sp
  400808:	12800000 	mov	w0, #0xffffffff            	// #-1
  40080c:	b9001fa0 	str	w0, [x29, #28]
  400810:	94000163 	bl	400d9c <format_buffer_data>
  400814:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400818:	91116000 	add	x0, x0, #0x458
  40081c:	b9400000 	ldr	w0, [x0]
  400820:	7100001f 	cmp	w0, #0x0
  400824:	54000720 	b.eq	400908 <try_extract_data+0x108>  // b.none
  400828:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  40082c:	91116000 	add	x0, x0, #0x458
  400830:	b9400001 	ldr	w1, [x0]
  400834:	d0000180 	adrp	x0, 432000 <rtcm_datas+0x1fa98>
  400838:	9115a000 	add	x0, x0, #0x568
  40083c:	9400021c 	bl	4010ac <indexof_first_0d0a>
  400840:	b9001fa0 	str	w0, [x29, #28]
  400844:	d0000180 	adrp	x0, 432000 <rtcm_datas+0x1fa98>
  400848:	9115a000 	add	x0, x0, #0x568
  40084c:	94000206 	bl	401064 <startwith_imu_head>
  400850:	7100001f 	cmp	w0, #0x0
  400854:	54000080 	b.eq	400864 <try_extract_data+0x64>  // b.none
  400858:	b9401fa0 	ldr	w0, [x29, #28]
  40085c:	3100041f 	cmn	w0, #0x1
  400860:	54000580 	b.eq	400910 <try_extract_data+0x110>  // b.none
  400864:	d0000180 	adrp	x0, 432000 <rtcm_datas+0x1fa98>
  400868:	9115a000 	add	x0, x0, #0x568
  40086c:	940001d9 	bl	400fd0 <startwith_gga_head>
  400870:	7100001f 	cmp	w0, #0x0
  400874:	54000100 	b.eq	400894 <try_extract_data+0x94>  // b.none
  400878:	b0000000 	adrp	x0, 401000 <startwith_gga_head+0x30>
  40087c:	91116000 	add	x0, x0, #0x458
  400880:	97ffff60 	bl	400600 <puts@plt>
  400884:	b9401fa0 	ldr	w0, [x29, #28]
  400888:	3100041f 	cmn	w0, #0x1
  40088c:	54000460 	b.eq	400918 <try_extract_data+0x118>  // b.none
  400890:	94000029 	bl	400934 <extract_gga>
  400894:	d0000180 	adrp	x0, 432000 <rtcm_datas+0x1fa98>
  400898:	9115a000 	add	x0, x0, #0x568
  40089c:	940001df 	bl	401018 <startwith_rtcm_head>
  4008a0:	7100001f 	cmp	w0, #0x0
  4008a4:	54000240 	b.eq	4008ec <try_extract_data+0xec>  // b.none
  4008a8:	b0000000 	adrp	x0, 401000 <startwith_gga_head+0x30>
  4008ac:	9111c000 	add	x0, x0, #0x470
  4008b0:	97ffff54 	bl	400600 <puts@plt>
  4008b4:	94000059 	bl	400a18 <extract_rtcm>
  4008b8:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  4008bc:	91116000 	add	x0, x0, #0x458
  4008c0:	b9400000 	ldr	w0, [x0]
  4008c4:	71000c1f 	cmp	w0, #0x3
  4008c8:	540002cd 	b.le	400920 <try_extract_data+0x120>
  4008cc:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  4008d0:	91159000 	add	x0, x0, #0x564
  4008d4:	b9400001 	ldr	w1, [x0]
  4008d8:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  4008dc:	91116000 	add	x0, x0, #0x458
  4008e0:	b9400000 	ldr	w0, [x0]
  4008e4:	6b00003f 	cmp	w1, w0
  4008e8:	5400020c 	b.gt	400928 <try_extract_data+0x128>
  4008ec:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  4008f0:	91116000 	add	x0, x0, #0x458
  4008f4:	b9400000 	ldr	w0, [x0]
  4008f8:	7100001f 	cmp	w0, #0x0
  4008fc:	5400018d 	b.le	40092c <try_extract_data+0x12c>
  400900:	97ffffc0 	bl	400800 <try_extract_data>
  400904:	1400000a 	b	40092c <try_extract_data+0x12c>
  400908:	d503201f 	nop
  40090c:	14000008 	b	40092c <try_extract_data+0x12c>
  400910:	d503201f 	nop
  400914:	14000006 	b	40092c <try_extract_data+0x12c>
  400918:	d503201f 	nop
  40091c:	14000004 	b	40092c <try_extract_data+0x12c>
  400920:	d503201f 	nop
  400924:	14000002 	b	40092c <try_extract_data+0x12c>
  400928:	d503201f 	nop
  40092c:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400930:	d65f03c0 	ret

0000000000400934 <extract_gga>:
  400934:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400938:	910003fd 	mov	x29, sp
  40093c:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400940:	91116000 	add	x0, x0, #0x458
  400944:	b9400001 	ldr	w1, [x0]
  400948:	d0000180 	adrp	x0, 432000 <rtcm_datas+0x1fa98>
  40094c:	9115a000 	add	x0, x0, #0x568
  400950:	940001d7 	bl	4010ac <indexof_first_0d0a>
  400954:	b9001fa0 	str	w0, [x29, #28]
  400958:	b9401fa0 	ldr	w0, [x29, #28]
  40095c:	7120001f 	cmp	w0, #0x800
  400960:	5400006d 	b.le	40096c <extract_gga+0x38>
  400964:	52810000 	mov	w0, #0x800                 	// #2048
  400968:	b9001fa0 	str	w0, [x29, #28]
  40096c:	b9401fa0 	ldr	w0, [x29, #28]
  400970:	3100041f 	cmn	w0, #0x1
  400974:	540004c0 	b.eq	400a0c <extract_gga+0xd8>  // b.none
  400978:	b9001bbf 	str	wzr, [x29, #24]
  40097c:	1400000c 	b	4009ac <extract_gga+0x78>
  400980:	d0000180 	adrp	x0, 432000 <rtcm_datas+0x1fa98>
  400984:	9115a001 	add	x1, x0, #0x568
  400988:	b9801ba0 	ldrsw	x0, [x29, #24]
  40098c:	38606822 	ldrb	w2, [x1, x0]
  400990:	f0000180 	adrp	x0, 433000 <imu_data+0x290>
  400994:	9115c001 	add	x1, x0, #0x570
  400998:	b9801ba0 	ldrsw	x0, [x29, #24]
  40099c:	38206822 	strb	w2, [x1, x0]
  4009a0:	b9401ba0 	ldr	w0, [x29, #24]
  4009a4:	11000400 	add	w0, w0, #0x1
  4009a8:	b9001ba0 	str	w0, [x29, #24]
  4009ac:	b9401ba1 	ldr	w1, [x29, #24]
  4009b0:	b9401fa0 	ldr	w0, [x29, #28]
  4009b4:	6b00003f 	cmp	w1, w0
  4009b8:	54fffe4b 	b.lt	400980 <extract_gga+0x4c>  // b.tstop
  4009bc:	f0000180 	adrp	x0, 433000 <imu_data+0x290>
  4009c0:	9115c001 	add	x1, x0, #0x570
  4009c4:	b9801ba0 	ldrsw	x0, [x29, #24]
  4009c8:	3820683f 	strb	wzr, [x1, x0]
  4009cc:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  4009d0:	91158000 	add	x0, x0, #0x560
  4009d4:	b900001f 	str	wzr, [x0]
  4009d8:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  4009dc:	91116000 	add	x0, x0, #0x458
  4009e0:	b9400001 	ldr	w1, [x0]
  4009e4:	b9401fa0 	ldr	w0, [x29, #28]
  4009e8:	4b000021 	sub	w1, w1, w0
  4009ec:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  4009f0:	91116000 	add	x0, x0, #0x458
  4009f4:	b9000001 	str	w1, [x0]
  4009f8:	d0000180 	adrp	x0, 432000 <rtcm_datas+0x1fa98>
  4009fc:	9115a000 	add	x0, x0, #0x568
  400a00:	3900001f 	strb	wzr, [x0]
  400a04:	940000e6 	bl	400d9c <format_buffer_data>
  400a08:	14000002 	b	400a10 <extract_gga+0xdc>
  400a0c:	d503201f 	nop
  400a10:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400a14:	d65f03c0 	ret

0000000000400a18 <extract_rtcm>:
  400a18:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  400a1c:	910003fd 	mov	x29, sp
  400a20:	b9002bbf 	str	wzr, [x29, #40]
  400a24:	b90027bf 	str	wzr, [x29, #36]
  400a28:	b9002fbf 	str	wzr, [x29, #44]
  400a2c:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400a30:	91116000 	add	x0, x0, #0x458
  400a34:	b9400000 	ldr	w0, [x0]
  400a38:	71000c1f 	cmp	w0, #0x3
  400a3c:	54001a6d 	b.le	400d88 <extract_rtcm+0x370>
  400a40:	d0000180 	adrp	x0, 432000 <rtcm_datas+0x1fa98>
  400a44:	9115a000 	add	x0, x0, #0x568
  400a48:	39400400 	ldrb	w0, [x0, #1]
  400a4c:	531c6c00 	lsl	w0, w0, #4
  400a50:	121c0400 	and	w0, w0, #0x30
  400a54:	b9402ba1 	ldr	w1, [x29, #40]
  400a58:	0b000020 	add	w0, w1, w0
  400a5c:	b9002ba0 	str	w0, [x29, #40]
  400a60:	d0000180 	adrp	x0, 432000 <rtcm_datas+0x1fa98>
  400a64:	9115a000 	add	x0, x0, #0x568
  400a68:	39400800 	ldrb	w0, [x0, #2]
  400a6c:	2a0003e1 	mov	w1, w0
  400a70:	b9402ba0 	ldr	w0, [x29, #40]
  400a74:	0b010000 	add	w0, w0, w1
  400a78:	b9002ba0 	str	w0, [x29, #40]
  400a7c:	b9402ba0 	ldr	w0, [x29, #40]
  400a80:	940001d7 	bl	4011dc <get_rtcm_total_length>
  400a84:	b90027a0 	str	w0, [x29, #36]
  400a88:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400a8c:	91159000 	add	x0, x0, #0x564
  400a90:	b94027a1 	ldr	w1, [x29, #36]
  400a94:	b9000001 	str	w1, [x0]
  400a98:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400a9c:	91116000 	add	x0, x0, #0x458
  400aa0:	b9400000 	ldr	w0, [x0]
  400aa4:	b94027a1 	ldr	w1, [x29, #36]
  400aa8:	6b00003f 	cmp	w1, w0
  400aac:	5400172c 	b.gt	400d90 <extract_rtcm+0x378>
  400ab0:	d0000180 	adrp	x0, 432000 <rtcm_datas+0x1fa98>
  400ab4:	9115a000 	add	x0, x0, #0x568
  400ab8:	b94027a1 	ldr	w1, [x29, #36]
  400abc:	940001e8 	bl	40125c <get_checksum>
  400ac0:	f9000fa0 	str	x0, [x29, #24]
  400ac4:	b98027a0 	ldrsw	x0, [x29, #36]
  400ac8:	d1000c01 	sub	x1, x0, #0x3
  400acc:	d0000180 	adrp	x0, 432000 <rtcm_datas+0x1fa98>
  400ad0:	9115a000 	add	x0, x0, #0x568
  400ad4:	8b000020 	add	x0, x1, x0
  400ad8:	39400000 	ldrb	w0, [x0]
  400adc:	39005fa0 	strb	w0, [x29, #23]
  400ae0:	b98027a0 	ldrsw	x0, [x29, #36]
  400ae4:	d1000801 	sub	x1, x0, #0x2
  400ae8:	d0000180 	adrp	x0, 432000 <rtcm_datas+0x1fa98>
  400aec:	9115a000 	add	x0, x0, #0x568
  400af0:	8b000020 	add	x0, x1, x0
  400af4:	39400000 	ldrb	w0, [x0]
  400af8:	39005ba0 	strb	w0, [x29, #22]
  400afc:	b98027a0 	ldrsw	x0, [x29, #36]
  400b00:	d1000401 	sub	x1, x0, #0x1
  400b04:	d0000180 	adrp	x0, 432000 <rtcm_datas+0x1fa98>
  400b08:	9115a000 	add	x0, x0, #0x568
  400b0c:	8b000020 	add	x0, x1, x0
  400b10:	39400000 	ldrb	w0, [x0]
  400b14:	390057a0 	strb	w0, [x29, #21]
  400b18:	39405fa1 	ldrb	w1, [x29, #23]
  400b1c:	b0000000 	adrp	x0, 401000 <startwith_gga_head+0x30>
  400b20:	91122000 	add	x0, x0, #0x488
  400b24:	97fffebb 	bl	400610 <printf@plt>
  400b28:	39405ba1 	ldrb	w1, [x29, #22]
  400b2c:	b0000000 	adrp	x0, 401000 <startwith_gga_head+0x30>
  400b30:	91122000 	add	x0, x0, #0x488
  400b34:	97fffeb7 	bl	400610 <printf@plt>
  400b38:	394057a1 	ldrb	w1, [x29, #21]
  400b3c:	b0000000 	adrp	x0, 401000 <startwith_gga_head+0x30>
  400b40:	91122000 	add	x0, x0, #0x488
  400b44:	97fffeb3 	bl	400610 <printf@plt>
  400b48:	f9400fa0 	ldr	x0, [x29, #24]
  400b4c:	39400000 	ldrb	w0, [x0]
  400b50:	39405fa1 	ldrb	w1, [x29, #23]
  400b54:	6b00003f 	cmp	w1, w0
  400b58:	540010e1 	b.ne	400d74 <extract_rtcm+0x35c>  // b.any
  400b5c:	f9400fa0 	ldr	x0, [x29, #24]
  400b60:	91000400 	add	x0, x0, #0x1
  400b64:	39400000 	ldrb	w0, [x0]
  400b68:	39405ba1 	ldrb	w1, [x29, #22]
  400b6c:	6b00003f 	cmp	w1, w0
  400b70:	54001021 	b.ne	400d74 <extract_rtcm+0x35c>  // b.any
  400b74:	f9400fa0 	ldr	x0, [x29, #24]
  400b78:	91000800 	add	x0, x0, #0x2
  400b7c:	39400000 	ldrb	w0, [x0]
  400b80:	394057a1 	ldrb	w1, [x29, #21]
  400b84:	6b00003f 	cmp	w1, w0
  400b88:	54000f61 	b.ne	400d74 <extract_rtcm+0x35c>  // b.any
  400b8c:	d0000180 	adrp	x0, 432000 <rtcm_datas+0x1fa98>
  400b90:	9115a000 	add	x0, x0, #0x568
  400b94:	9400017b 	bl	401180 <getRtcmType>
  400b98:	b90013a0 	str	w0, [x29, #16]
  400b9c:	b94013a0 	ldr	w0, [x29, #16]
  400ba0:	7110c81f 	cmp	w0, #0x432
  400ba4:	54000080 	b.eq	400bb4 <extract_rtcm+0x19c>  // b.none
  400ba8:	b94013a0 	ldr	w0, [x29, #16]
  400bac:	7110cc1f 	cmp	w0, #0x433
  400bb0:	540000a1 	b.ne	400bc4 <extract_rtcm+0x1ac>  // b.any
  400bb4:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400bb8:	91158000 	add	x0, x0, #0x560
  400bbc:	b900001f 	str	wzr, [x0]
  400bc0:	14000020 	b	400c40 <extract_rtcm+0x228>
  400bc4:	b94013a0 	ldr	w0, [x29, #16]
  400bc8:	710fec1f 	cmp	w0, #0x3fb
  400bcc:	540000e0 	b.eq	400be8 <extract_rtcm+0x1d0>  // b.none
  400bd0:	b94013a0 	ldr	w0, [x29, #16]
  400bd4:	7110501f 	cmp	w0, #0x414
  400bd8:	54000080 	b.eq	400be8 <extract_rtcm+0x1d0>  // b.none
  400bdc:	b94013a0 	ldr	w0, [x29, #16]
  400be0:	7110481f 	cmp	w0, #0x412
  400be4:	54000121 	b.ne	400c08 <extract_rtcm+0x1f0>  // b.any
  400be8:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400bec:	91158000 	add	x0, x0, #0x560
  400bf0:	b900001f 	str	wzr, [x0]
  400bf4:	d0000180 	adrp	x0, 432000 <rtcm_datas+0x1fa98>
  400bf8:	9115a000 	add	x0, x0, #0x568
  400bfc:	3900001f 	strb	wzr, [x0]
  400c00:	94000067 	bl	400d9c <format_buffer_data>
  400c04:	14000064 	b	400d94 <extract_rtcm+0x37c>
  400c08:	b94013a0 	ldr	w0, [x29, #16]
  400c0c:	7111901f 	cmp	w0, #0x464
  400c10:	54000180 	b.eq	400c40 <extract_rtcm+0x228>  // b.none
  400c14:	b94013a0 	ldr	w0, [x29, #16]
  400c18:	7111941f 	cmp	w0, #0x465
  400c1c:	54000120 	b.eq	400c40 <extract_rtcm+0x228>  // b.none
  400c20:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400c24:	91158000 	add	x0, x0, #0x560
  400c28:	b900001f 	str	wzr, [x0]
  400c2c:	d0000180 	adrp	x0, 432000 <rtcm_datas+0x1fa98>
  400c30:	9115a000 	add	x0, x0, #0x568
  400c34:	3900001f 	strb	wzr, [x0]
  400c38:	94000059 	bl	400d9c <format_buffer_data>
  400c3c:	14000056 	b	400d94 <extract_rtcm+0x37c>
  400c40:	b9002fbf 	str	wzr, [x29, #44]
  400c44:	14000015 	b	400c98 <extract_rtcm+0x280>
  400c48:	b9802fa1 	ldrsw	x1, [x29, #44]
  400c4c:	d0000180 	adrp	x0, 432000 <rtcm_datas+0x1fa98>
  400c50:	9115a000 	add	x0, x0, #0x568
  400c54:	8b000020 	add	x0, x1, x0
  400c58:	d0000081 	adrp	x1, 412000 <strlen@GLIBC_2.17>
  400c5c:	91158021 	add	x1, x1, #0x560
  400c60:	b9400021 	ldr	w1, [x1]
  400c64:	39400003 	ldrb	w3, [x0]
  400c68:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400c6c:	9115a002 	add	x2, x0, #0x568
  400c70:	b9802fa0 	ldrsw	x0, [x29, #44]
  400c74:	93407c21 	sxtw	x1, w1
  400c78:	d375d021 	lsl	x1, x1, #11
  400c7c:	8b010041 	add	x1, x2, x1
  400c80:	8b000020 	add	x0, x1, x0
  400c84:	2a0303e1 	mov	w1, w3
  400c88:	39000001 	strb	w1, [x0]
  400c8c:	b9402fa0 	ldr	w0, [x29, #44]
  400c90:	11000400 	add	w0, w0, #0x1
  400c94:	b9002fa0 	str	w0, [x29, #44]
  400c98:	b9402fa1 	ldr	w1, [x29, #44]
  400c9c:	b94027a0 	ldr	w0, [x29, #36]
  400ca0:	6b00003f 	cmp	w1, w0
  400ca4:	54fffd2b 	b.lt	400c48 <extract_rtcm+0x230>  // b.tstop
  400ca8:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400cac:	91158000 	add	x0, x0, #0x560
  400cb0:	b9400001 	ldr	w1, [x0]
  400cb4:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400cb8:	91118000 	add	x0, x0, #0x460
  400cbc:	93407c21 	sxtw	x1, w1
  400cc0:	b94027a2 	ldr	w2, [x29, #36]
  400cc4:	b8217802 	str	w2, [x0, x1, lsl #2]
  400cc8:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400ccc:	91158000 	add	x0, x0, #0x560
  400cd0:	b9400000 	ldr	w0, [x0]
  400cd4:	93407c00 	sxtw	x0, w0
  400cd8:	d375d001 	lsl	x1, x0, #11
  400cdc:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400ce0:	9115a000 	add	x0, x0, #0x568
  400ce4:	8b000020 	add	x0, x1, x0
  400ce8:	b94027a1 	ldr	w1, [x29, #36]
  400cec:	94000110 	bl	40112c <endOfRtcm>
  400cf0:	7100001f 	cmp	w0, #0x0
  400cf4:	54000320 	b.eq	400d58 <extract_rtcm+0x340>  // b.none
  400cf8:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400cfc:	91158000 	add	x0, x0, #0x560
  400d00:	b9400000 	ldr	w0, [x0]
  400d04:	11000401 	add	w1, w0, #0x1
  400d08:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400d0c:	91158000 	add	x0, x0, #0x560
  400d10:	b9000001 	str	w1, [x0]
  400d14:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400d18:	91158000 	add	x0, x0, #0x560
  400d1c:	b9400001 	ldr	w1, [x0]
  400d20:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400d24:	91118000 	add	x0, x0, #0x460
  400d28:	93407c21 	sxtw	x1, w1
  400d2c:	b821781f 	str	wzr, [x0, x1, lsl #2]
  400d30:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400d34:	91158000 	add	x0, x0, #0x560
  400d38:	b9400002 	ldr	w2, [x0]
  400d3c:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400d40:	9115a001 	add	x1, x0, #0x568
  400d44:	93407c40 	sxtw	x0, w2
  400d48:	d375d000 	lsl	x0, x0, #11
  400d4c:	8b000020 	add	x0, x1, x0
  400d50:	3900001f 	strb	wzr, [x0]
  400d54:	14000008 	b	400d74 <extract_rtcm+0x35c>
  400d58:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400d5c:	91158000 	add	x0, x0, #0x560
  400d60:	b9400000 	ldr	w0, [x0]
  400d64:	11000401 	add	w1, w0, #0x1
  400d68:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400d6c:	91158000 	add	x0, x0, #0x560
  400d70:	b9000001 	str	w1, [x0]
  400d74:	d0000180 	adrp	x0, 432000 <rtcm_datas+0x1fa98>
  400d78:	9115a000 	add	x0, x0, #0x568
  400d7c:	3900001f 	strb	wzr, [x0]
  400d80:	94000007 	bl	400d9c <format_buffer_data>
  400d84:	14000004 	b	400d94 <extract_rtcm+0x37c>
  400d88:	d503201f 	nop
  400d8c:	14000002 	b	400d94 <extract_rtcm+0x37c>
  400d90:	d503201f 	nop
  400d94:	a8c37bfd 	ldp	x29, x30, [sp], #48
  400d98:	d65f03c0 	ret

0000000000400d9c <format_buffer_data>:
  400d9c:	d12083ff 	sub	sp, sp, #0x820
  400da0:	a9007bfd 	stp	x29, x30, [sp]
  400da4:	910003fd 	mov	x29, sp
  400da8:	94000045 	bl	400ebc <get_effective_head_tag_index>
  400dac:	b9081ba0 	str	w0, [x29, #2072]
  400db0:	b0000000 	adrp	x0, 401000 <startwith_gga_head+0x30>
  400db4:	91124000 	add	x0, x0, #0x490
  400db8:	b9481ba1 	ldr	w1, [x29, #2072]
  400dbc:	97fffe15 	bl	400610 <printf@plt>
  400dc0:	b9481ba0 	ldr	w0, [x29, #2072]
  400dc4:	3100041f 	cmn	w0, #0x1
  400dc8:	540000a1 	b.ne	400ddc <format_buffer_data+0x40>  // b.any
  400dcc:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400dd0:	91116000 	add	x0, x0, #0x458
  400dd4:	b900001f 	str	wzr, [x0]
  400dd8:	14000036 	b	400eb0 <format_buffer_data+0x114>
  400ddc:	b9481ba0 	ldr	w0, [x29, #2072]
  400de0:	7100001f 	cmp	w0, #0x0
  400de4:	54000640 	b.eq	400eac <format_buffer_data+0x110>  // b.none
  400de8:	b9481ba0 	ldr	w0, [x29, #2072]
  400dec:	b9081fa0 	str	w0, [x29, #2076]
  400df0:	1400000e 	b	400e28 <format_buffer_data+0x8c>
  400df4:	b9481fa1 	ldr	w1, [x29, #2076]
  400df8:	b9481ba0 	ldr	w0, [x29, #2072]
  400dfc:	4b000023 	sub	w3, w1, w0
  400e00:	d0000180 	adrp	x0, 432000 <rtcm_datas+0x1fa98>
  400e04:	9115a001 	add	x1, x0, #0x568
  400e08:	b9881fa0 	ldrsw	x0, [x29, #2076]
  400e0c:	38606822 	ldrb	w2, [x1, x0]
  400e10:	93407c60 	sxtw	x0, w3
  400e14:	910063a1 	add	x1, x29, #0x18
  400e18:	38206822 	strb	w2, [x1, x0]
  400e1c:	b9481fa0 	ldr	w0, [x29, #2076]
  400e20:	11000400 	add	w0, w0, #0x1
  400e24:	b9081fa0 	str	w0, [x29, #2076]
  400e28:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400e2c:	91116000 	add	x0, x0, #0x458
  400e30:	b9400000 	ldr	w0, [x0]
  400e34:	b9481fa1 	ldr	w1, [x29, #2076]
  400e38:	6b00003f 	cmp	w1, w0
  400e3c:	54fffdcb 	b.lt	400df4 <format_buffer_data+0x58>  // b.tstop
  400e40:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400e44:	91116000 	add	x0, x0, #0x458
  400e48:	b9400001 	ldr	w1, [x0]
  400e4c:	b9481ba0 	ldr	w0, [x29, #2072]
  400e50:	4b000021 	sub	w1, w1, w0
  400e54:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400e58:	91116000 	add	x0, x0, #0x458
  400e5c:	b9000001 	str	w1, [x0]
  400e60:	b9081fbf 	str	wzr, [x29, #2076]
  400e64:	1400000b 	b	400e90 <format_buffer_data+0xf4>
  400e68:	b9881fa0 	ldrsw	x0, [x29, #2076]
  400e6c:	910063a1 	add	x1, x29, #0x18
  400e70:	38606822 	ldrb	w2, [x1, x0]
  400e74:	d0000180 	adrp	x0, 432000 <rtcm_datas+0x1fa98>
  400e78:	9115a001 	add	x1, x0, #0x568
  400e7c:	b9881fa0 	ldrsw	x0, [x29, #2076]
  400e80:	38206822 	strb	w2, [x1, x0]
  400e84:	b9481fa0 	ldr	w0, [x29, #2076]
  400e88:	11000400 	add	w0, w0, #0x1
  400e8c:	b9081fa0 	str	w0, [x29, #2076]
  400e90:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400e94:	91116000 	add	x0, x0, #0x458
  400e98:	b9400000 	ldr	w0, [x0]
  400e9c:	b9481fa1 	ldr	w1, [x29, #2076]
  400ea0:	6b00003f 	cmp	w1, w0
  400ea4:	54fffe2b 	b.lt	400e68 <format_buffer_data+0xcc>  // b.tstop
  400ea8:	14000002 	b	400eb0 <format_buffer_data+0x114>
  400eac:	d503201f 	nop
  400eb0:	a9407bfd 	ldp	x29, x30, [sp]
  400eb4:	912083ff 	add	sp, sp, #0x820
  400eb8:	d65f03c0 	ret

0000000000400ebc <get_effective_head_tag_index>:
  400ebc:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400ec0:	910003fd 	mov	x29, sp
  400ec4:	12800000 	mov	w0, #0xffffffff            	// #-1
  400ec8:	b9001ba0 	str	w0, [x29, #24]
  400ecc:	b9001fbf 	str	wzr, [x29, #28]
  400ed0:	b9001fbf 	str	wzr, [x29, #28]
  400ed4:	14000036 	b	400fac <get_effective_head_tag_index+0xf0>
  400ed8:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400edc:	91116000 	add	x0, x0, #0x458
  400ee0:	b9400000 	ldr	w0, [x0]
  400ee4:	51001400 	sub	w0, w0, #0x5
  400ee8:	b9401fa1 	ldr	w1, [x29, #28]
  400eec:	6b00003f 	cmp	w1, w0
  400ef0:	5400032a 	b.ge	400f54 <get_effective_head_tag_index+0x98>  // b.tcont
  400ef4:	b9801fa1 	ldrsw	x1, [x29, #28]
  400ef8:	d0000180 	adrp	x0, 432000 <rtcm_datas+0x1fa98>
  400efc:	9115a000 	add	x0, x0, #0x568
  400f00:	8b000020 	add	x0, x1, x0
  400f04:	94000058 	bl	401064 <startwith_imu_head>
  400f08:	7100001f 	cmp	w0, #0x0
  400f0c:	540000c0 	b.eq	400f24 <get_effective_head_tag_index+0x68>  // b.none
  400f10:	b0000000 	adrp	x0, 401000 <startwith_gga_head+0x30>
  400f14:	91128000 	add	x0, x0, #0x4a0
  400f18:	97fffdbe 	bl	400610 <printf@plt>
  400f1c:	b9401fa0 	ldr	w0, [x29, #28]
  400f20:	1400002a 	b	400fc8 <get_effective_head_tag_index+0x10c>
  400f24:	b9801fa1 	ldrsw	x1, [x29, #28]
  400f28:	d0000180 	adrp	x0, 432000 <rtcm_datas+0x1fa98>
  400f2c:	9115a000 	add	x0, x0, #0x568
  400f30:	8b000020 	add	x0, x1, x0
  400f34:	94000027 	bl	400fd0 <startwith_gga_head>
  400f38:	7100001f 	cmp	w0, #0x0
  400f3c:	540000c0 	b.eq	400f54 <get_effective_head_tag_index+0x98>  // b.none
  400f40:	b0000000 	adrp	x0, 401000 <startwith_gga_head+0x30>
  400f44:	9112a000 	add	x0, x0, #0x4a8
  400f48:	97fffdb2 	bl	400610 <printf@plt>
  400f4c:	b9401fa0 	ldr	w0, [x29, #28]
  400f50:	1400001e 	b	400fc8 <get_effective_head_tag_index+0x10c>
  400f54:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400f58:	91116000 	add	x0, x0, #0x458
  400f5c:	b9400000 	ldr	w0, [x0]
  400f60:	51000400 	sub	w0, w0, #0x1
  400f64:	b9401fa1 	ldr	w1, [x29, #28]
  400f68:	6b00003f 	cmp	w1, w0
  400f6c:	540001aa 	b.ge	400fa0 <get_effective_head_tag_index+0xe4>  // b.tcont
  400f70:	b9801fa1 	ldrsw	x1, [x29, #28]
  400f74:	d0000180 	adrp	x0, 432000 <rtcm_datas+0x1fa98>
  400f78:	9115a000 	add	x0, x0, #0x568
  400f7c:	8b000020 	add	x0, x1, x0
  400f80:	94000026 	bl	401018 <startwith_rtcm_head>
  400f84:	7100001f 	cmp	w0, #0x0
  400f88:	540000c0 	b.eq	400fa0 <get_effective_head_tag_index+0xe4>  // b.none
  400f8c:	b0000000 	adrp	x0, 401000 <startwith_gga_head+0x30>
  400f90:	9112c000 	add	x0, x0, #0x4b0
  400f94:	97fffd9f 	bl	400610 <printf@plt>
  400f98:	b9401fa0 	ldr	w0, [x29, #28]
  400f9c:	1400000b 	b	400fc8 <get_effective_head_tag_index+0x10c>
  400fa0:	b9401fa0 	ldr	w0, [x29, #28]
  400fa4:	11000400 	add	w0, w0, #0x1
  400fa8:	b9001fa0 	str	w0, [x29, #28]
  400fac:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  400fb0:	91116000 	add	x0, x0, #0x458
  400fb4:	b9400000 	ldr	w0, [x0]
  400fb8:	b9401fa1 	ldr	w1, [x29, #28]
  400fbc:	6b00003f 	cmp	w1, w0
  400fc0:	54fff8cb 	b.lt	400ed8 <get_effective_head_tag_index+0x1c>  // b.tstop
  400fc4:	b9401ba0 	ldr	w0, [x29, #24]
  400fc8:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400fcc:	d65f03c0 	ret

0000000000400fd0 <startwith_gga_head>:
  400fd0:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  400fd4:	910003fd 	mov	x29, sp
  400fd8:	f9000fa0 	str	x0, [x29, #24]
  400fdc:	b0000000 	adrp	x0, 401000 <startwith_gga_head+0x30>
  400fe0:	9110a000 	add	x0, x0, #0x428
  400fe4:	d28000c2 	mov	x2, #0x6                   	// #6
  400fe8:	aa0003e1 	mov	x1, x0
  400fec:	f9400fa0 	ldr	x0, [x29, #24]
  400ff0:	97fffd74 	bl	4005c0 <strncmp@plt>
  400ff4:	b9002fa0 	str	w0, [x29, #44]
  400ff8:	b9402fa0 	ldr	w0, [x29, #44]
  400ffc:	7100001f 	cmp	w0, #0x0
  401000:	1a9f17e0 	cset	w0, eq  // eq = none
  401004:	12001c00 	and	w0, w0, #0xff
  401008:	b9002ba0 	str	w0, [x29, #40]
  40100c:	b9402ba0 	ldr	w0, [x29, #40]
  401010:	a8c37bfd 	ldp	x29, x30, [sp], #48
  401014:	d65f03c0 	ret

0000000000401018 <startwith_rtcm_head>:
  401018:	d10083ff 	sub	sp, sp, #0x20
  40101c:	f90007e0 	str	x0, [sp, #8]
  401020:	f94007e0 	ldr	x0, [sp, #8]
  401024:	39400000 	ldrb	w0, [x0]
  401028:	71034c1f 	cmp	w0, #0xd3
  40102c:	54000161 	b.ne	401058 <startwith_rtcm_head+0x40>  // b.any
  401030:	f94007e0 	ldr	x0, [sp, #8]
  401034:	91000400 	add	x0, x0, #0x1
  401038:	39400000 	ldrb	w0, [x0]
  40103c:	121e7400 	and	w0, w0, #0xfffffffc
  401040:	39007fe0 	strb	w0, [sp, #31]
  401044:	39407fe0 	ldrb	w0, [sp, #31]
  401048:	7100001f 	cmp	w0, #0x0
  40104c:	54000061 	b.ne	401058 <startwith_rtcm_head+0x40>  // b.any
  401050:	52800020 	mov	w0, #0x1                   	// #1
  401054:	14000002 	b	40105c <startwith_rtcm_head+0x44>
  401058:	52800000 	mov	w0, #0x0                   	// #0
  40105c:	910083ff 	add	sp, sp, #0x20
  401060:	d65f03c0 	ret

0000000000401064 <startwith_imu_head>:
  401064:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  401068:	910003fd 	mov	x29, sp
  40106c:	f9000fa0 	str	x0, [x29, #24]
  401070:	90000000 	adrp	x0, 401000 <startwith_gga_head+0x30>
  401074:	9110c000 	add	x0, x0, #0x430
  401078:	d28000c2 	mov	x2, #0x6                   	// #6
  40107c:	aa0003e1 	mov	x1, x0
  401080:	f9400fa0 	ldr	x0, [x29, #24]
  401084:	97fffd4f 	bl	4005c0 <strncmp@plt>
  401088:	b9002fa0 	str	w0, [x29, #44]
  40108c:	b9402fa0 	ldr	w0, [x29, #44]
  401090:	7100001f 	cmp	w0, #0x0
  401094:	1a9f17e0 	cset	w0, eq  // eq = none
  401098:	12001c00 	and	w0, w0, #0xff
  40109c:	b9002ba0 	str	w0, [x29, #40]
  4010a0:	b9402ba0 	ldr	w0, [x29, #40]
  4010a4:	a8c37bfd 	ldp	x29, x30, [sp], #48
  4010a8:	d65f03c0 	ret

00000000004010ac <indexof_first_0d0a>:
  4010ac:	d10083ff 	sub	sp, sp, #0x20
  4010b0:	f90007e0 	str	x0, [sp, #8]
  4010b4:	b90007e1 	str	w1, [sp, #4]
  4010b8:	b9001fff 	str	wzr, [sp, #28]
  4010bc:	b9001fff 	str	wzr, [sp, #28]
  4010c0:	14000013 	b	40110c <indexof_first_0d0a+0x60>
  4010c4:	b9801fe0 	ldrsw	x0, [sp, #28]
  4010c8:	f94007e1 	ldr	x1, [sp, #8]
  4010cc:	8b000020 	add	x0, x1, x0
  4010d0:	39400000 	ldrb	w0, [x0]
  4010d4:	7100341f 	cmp	w0, #0xd
  4010d8:	54000141 	b.ne	401100 <indexof_first_0d0a+0x54>  // b.any
  4010dc:	b9801fe0 	ldrsw	x0, [sp, #28]
  4010e0:	91000400 	add	x0, x0, #0x1
  4010e4:	f94007e1 	ldr	x1, [sp, #8]
  4010e8:	8b000020 	add	x0, x1, x0
  4010ec:	39400000 	ldrb	w0, [x0]
  4010f0:	7100281f 	cmp	w0, #0xa
  4010f4:	54000061 	b.ne	401100 <indexof_first_0d0a+0x54>  // b.any
  4010f8:	b9401fe0 	ldr	w0, [sp, #28]
  4010fc:	1400000a 	b	401124 <indexof_first_0d0a+0x78>
  401100:	b9401fe0 	ldr	w0, [sp, #28]
  401104:	11000400 	add	w0, w0, #0x1
  401108:	b9001fe0 	str	w0, [sp, #28]
  40110c:	b94007e0 	ldr	w0, [sp, #4]
  401110:	51000400 	sub	w0, w0, #0x1
  401114:	b9401fe1 	ldr	w1, [sp, #28]
  401118:	6b00003f 	cmp	w1, w0
  40111c:	54fffd4b 	b.lt	4010c4 <indexof_first_0d0a+0x18>  // b.tstop
  401120:	12800000 	mov	w0, #0xffffffff            	// #-1
  401124:	910083ff 	add	sp, sp, #0x20
  401128:	d65f03c0 	ret

000000000040112c <endOfRtcm>:
  40112c:	d10083ff 	sub	sp, sp, #0x20
  401130:	f90007e0 	str	x0, [sp, #8]
  401134:	b90007e1 	str	w1, [sp, #4]
  401138:	52800020 	mov	w0, #0x1                   	// #1
  40113c:	b9001fe0 	str	w0, [sp, #28]
  401140:	b94007e0 	ldr	w0, [sp, #4]
  401144:	7100241f 	cmp	w0, #0x9
  401148:	5400006c 	b.gt	401154 <endOfRtcm+0x28>
  40114c:	b9401fe0 	ldr	w0, [sp, #28]
  401150:	1400000a 	b	401178 <endOfRtcm+0x4c>
  401154:	f94007e0 	ldr	x0, [sp, #8]
  401158:	39402400 	ldrb	w0, [x0, #9]
  40115c:	39006fe0 	strb	w0, [sp, #27]
  401160:	39406fe0 	ldrb	w0, [sp, #27]
  401164:	53017c00 	lsr	w0, w0, #1
  401168:	12001c00 	and	w0, w0, #0xff
  40116c:	12000000 	and	w0, w0, #0x1
  401170:	b9001fe0 	str	w0, [sp, #28]
  401174:	b9401fe0 	ldr	w0, [sp, #28]
  401178:	910083ff 	add	sp, sp, #0x20
  40117c:	d65f03c0 	ret

0000000000401180 <getRtcmType>:
  401180:	d10083ff 	sub	sp, sp, #0x20
  401184:	f90007e0 	str	x0, [sp, #8]
  401188:	b9001bff 	str	wzr, [sp, #24]
  40118c:	b90017ff 	str	wzr, [sp, #20]
  401190:	f94007e0 	ldr	x0, [sp, #8]
  401194:	91000c00 	add	x0, x0, #0x3
  401198:	39400000 	ldrb	w0, [x0]
  40119c:	390063e0 	strb	w0, [sp, #24]
  4011a0:	f94007e0 	ldr	x0, [sp, #8]
  4011a4:	91001000 	add	x0, x0, #0x4
  4011a8:	39400000 	ldrb	w0, [x0]
  4011ac:	390053e0 	strb	w0, [sp, #20]
  4011b0:	b94017e0 	ldr	w0, [sp, #20]
  4011b4:	13047c00 	asr	w0, w0, #4
  4011b8:	b90017e0 	str	w0, [sp, #20]
  4011bc:	b9401be0 	ldr	w0, [sp, #24]
  4011c0:	531c6c01 	lsl	w1, w0, #4
  4011c4:	b94017e0 	ldr	w0, [sp, #20]
  4011c8:	0b000020 	add	w0, w1, w0
  4011cc:	b9001fe0 	str	w0, [sp, #28]
  4011d0:	b9401fe0 	ldr	w0, [sp, #28]
  4011d4:	910083ff 	add	sp, sp, #0x20
  4011d8:	d65f03c0 	ret

00000000004011dc <get_rtcm_total_length>:
  4011dc:	d10043ff 	sub	sp, sp, #0x10
  4011e0:	b9000fe0 	str	w0, [sp, #12]
  4011e4:	b9400fe0 	ldr	w0, [sp, #12]
  4011e8:	11001800 	add	w0, w0, #0x6
  4011ec:	910043ff 	add	sp, sp, #0x10
  4011f0:	d65f03c0 	ret

00000000004011f4 <print_hex>:
  4011f4:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  4011f8:	910003fd 	mov	x29, sp
  4011fc:	f9000fa0 	str	x0, [x29, #24]
  401200:	b90017a1 	str	w1, [x29, #20]
  401204:	b9002fbf 	str	wzr, [x29, #44]
  401208:	1400000c 	b	401238 <print_hex+0x44>
  40120c:	b9802fa0 	ldrsw	x0, [x29, #44]
  401210:	f9400fa1 	ldr	x1, [x29, #24]
  401214:	8b000020 	add	x0, x1, x0
  401218:	39400000 	ldrb	w0, [x0]
  40121c:	2a0003e1 	mov	w1, w0
  401220:	90000000 	adrp	x0, 401000 <startwith_gga_head+0x30>
  401224:	9112e000 	add	x0, x0, #0x4b8
  401228:	97fffcfa 	bl	400610 <printf@plt>
  40122c:	b9402fa0 	ldr	w0, [x29, #44]
  401230:	11000400 	add	w0, w0, #0x1
  401234:	b9002fa0 	str	w0, [x29, #44]
  401238:	b9402fa1 	ldr	w1, [x29, #44]
  40123c:	b94017a0 	ldr	w0, [x29, #20]
  401240:	6b00003f 	cmp	w1, w0
  401244:	54fffe4b 	b.lt	40120c <print_hex+0x18>  // b.tstop
  401248:	52800140 	mov	w0, #0xa                   	// #10
  40124c:	97fffcf5 	bl	400620 <putchar@plt>
  401250:	d503201f 	nop
  401254:	a8c37bfd 	ldp	x29, x30, [sp], #48
  401258:	d65f03c0 	ret

000000000040125c <get_checksum>:
  40125c:	d10083ff 	sub	sp, sp, #0x20
  401260:	f90007e0 	str	x0, [sp, #8]
  401264:	b90007e1 	str	w1, [sp, #4]
  401268:	b9001fff 	str	wzr, [sp, #28]
  40126c:	b9001bff 	str	wzr, [sp, #24]
  401270:	b9001bff 	str	wzr, [sp, #24]
  401274:	14000014 	b	4012c4 <get_checksum+0x68>
  401278:	b9401fe0 	ldr	w0, [sp, #28]
  40127c:	53185c00 	lsl	w0, w0, #8
  401280:	12005c01 	and	w1, w0, #0xffffff
  401284:	b9401fe0 	ldr	w0, [sp, #28]
  401288:	13107c00 	asr	w0, w0, #16
  40128c:	b9801be2 	ldrsw	x2, [sp, #24]
  401290:	f94007e3 	ldr	x3, [sp, #8]
  401294:	8b020062 	add	x2, x3, x2
  401298:	39400042 	ldrb	w2, [x2]
  40129c:	4a020002 	eor	w2, w0, w2
  4012a0:	b0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  4012a4:	91014000 	add	x0, x0, #0x50
  4012a8:	93407c42 	sxtw	x2, w2
  4012ac:	b8627800 	ldr	w0, [x0, x2, lsl #2]
  4012b0:	4a000020 	eor	w0, w1, w0
  4012b4:	b9001fe0 	str	w0, [sp, #28]
  4012b8:	b9401be0 	ldr	w0, [sp, #24]
  4012bc:	11000400 	add	w0, w0, #0x1
  4012c0:	b9001be0 	str	w0, [sp, #24]
  4012c4:	b94007e0 	ldr	w0, [sp, #4]
  4012c8:	51000c00 	sub	w0, w0, #0x3
  4012cc:	b9401be1 	ldr	w1, [sp, #24]
  4012d0:	6b00003f 	cmp	w1, w0
  4012d4:	54fffd2b 	b.lt	401278 <get_checksum+0x1c>  // b.tstop
  4012d8:	b9401fe0 	ldr	w0, [sp, #28]
  4012dc:	13107c00 	asr	w0, w0, #16
  4012e0:	12001c01 	and	w1, w0, #0xff
  4012e4:	b0000180 	adrp	x0, 432000 <rtcm_datas+0x1fa98>
  4012e8:	9135a000 	add	x0, x0, #0xd68
  4012ec:	39000001 	strb	w1, [x0]
  4012f0:	b9401fe0 	ldr	w0, [sp, #28]
  4012f4:	13087c00 	asr	w0, w0, #8
  4012f8:	12001c01 	and	w1, w0, #0xff
  4012fc:	b0000180 	adrp	x0, 432000 <rtcm_datas+0x1fa98>
  401300:	9135a000 	add	x0, x0, #0xd68
  401304:	39000401 	strb	w1, [x0, #1]
  401308:	b9401fe0 	ldr	w0, [sp, #28]
  40130c:	12001c01 	and	w1, w0, #0xff
  401310:	b0000180 	adrp	x0, 432000 <rtcm_datas+0x1fa98>
  401314:	9135a000 	add	x0, x0, #0xd68
  401318:	39000801 	strb	w1, [x0, #2]
  40131c:	b0000180 	adrp	x0, 432000 <rtcm_datas+0x1fa98>
  401320:	9135a000 	add	x0, x0, #0xd68
  401324:	910083ff 	add	sp, sp, #0x20
  401328:	d65f03c0 	ret

000000000040132c <main>:
  40132c:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  401330:	910003fd 	mov	x29, sp
  401334:	90000000 	adrp	x0, 401000 <startwith_gga_head+0x30>
  401338:	91130000 	add	x0, x0, #0x4c0
  40133c:	f9000fa0 	str	x0, [x29, #24]
  401340:	f9400fa0 	ldr	x0, [x29, #24]
  401344:	97fffc9b 	bl	4005b0 <strlen@plt>
  401348:	aa0003e1 	mov	x1, x0
  40134c:	90000000 	adrp	x0, 401000 <startwith_gga_head+0x30>
  401350:	91142000 	add	x0, x0, #0x508
  401354:	97fffcaf 	bl	400610 <printf@plt>
  401358:	f9400fa0 	ldr	x0, [x29, #24]
  40135c:	97fffc95 	bl	4005b0 <strlen@plt>
  401360:	2a0003e1 	mov	w1, w0
  401364:	f9400fa0 	ldr	x0, [x29, #24]
  401368:	97fffcf1 	bl	40072c <extract_data>
  40136c:	52800000 	mov	w0, #0x0                   	// #0
  401370:	a8c27bfd 	ldp	x29, x30, [sp], #32
  401374:	d65f03c0 	ret

0000000000401378 <__libc_csu_init>:
  401378:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  40137c:	910003fd 	mov	x29, sp
  401380:	a901d7f4 	stp	x20, x21, [sp, #24]
  401384:	90000094 	adrp	x20, 411000 <__FRAME_END__+0xfae8>
  401388:	90000095 	adrp	x21, 411000 <__FRAME_END__+0xfae8>
  40138c:	91374294 	add	x20, x20, #0xdd0
  401390:	913722b5 	add	x21, x21, #0xdc8
  401394:	a902dff6 	stp	x22, x23, [sp, #40]
  401398:	cb150294 	sub	x20, x20, x21
  40139c:	f9001ff8 	str	x24, [sp, #56]
  4013a0:	2a0003f6 	mov	w22, w0
  4013a4:	aa0103f7 	mov	x23, x1
  4013a8:	9343fe94 	asr	x20, x20, #3
  4013ac:	aa0203f8 	mov	x24, x2
  4013b0:	97fffc72 	bl	400578 <_init>
  4013b4:	b4000194 	cbz	x20, 4013e4 <__libc_csu_init+0x6c>
  4013b8:	f9000bb3 	str	x19, [x29, #16]
  4013bc:	d2800013 	mov	x19, #0x0                   	// #0
  4013c0:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  4013c4:	aa1803e2 	mov	x2, x24
  4013c8:	aa1703e1 	mov	x1, x23
  4013cc:	2a1603e0 	mov	w0, w22
  4013d0:	91000673 	add	x19, x19, #0x1
  4013d4:	d63f0060 	blr	x3
  4013d8:	eb13029f 	cmp	x20, x19
  4013dc:	54ffff21 	b.ne	4013c0 <__libc_csu_init+0x48>  // b.any
  4013e0:	f9400bb3 	ldr	x19, [x29, #16]
  4013e4:	a941d7f4 	ldp	x20, x21, [sp, #24]
  4013e8:	a942dff6 	ldp	x22, x23, [sp, #40]
  4013ec:	f9401ff8 	ldr	x24, [sp, #56]
  4013f0:	a8c47bfd 	ldp	x29, x30, [sp], #64
  4013f4:	d65f03c0 	ret

00000000004013f8 <__libc_csu_fini>:
  4013f8:	d65f03c0 	ret

Disassembly of section .fini:

00000000004013fc <_fini>:
  4013fc:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  401400:	910003fd 	mov	x29, sp
  401404:	a8c17bfd 	ldp	x29, x30, [sp], #16
  401408:	d65f03c0 	ret
